On 11/03/2022 10:45, Vincent Whitchurch wrote: > Add a compatible for the UART on the ARTPEC-8 SoC. This hardware block > is closely related to the variants used on the Exynos chips. The > register layout is identical to Exynos850 et al but the fifo size is > different (64 bytes in each direction for all instances). > > Signed-off-by: Vincent Whitchurch <vincent.whitchurch@xxxxxxxx> > --- > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx> Best regards, Krzysztof
