Hi Laurent,
Thanks for the feedback.
> Subject: Re: [PATCH 1/2] dt-bindings: drm: bridge: adi,adv7533: Document
> adi,disable-lanes-override property
>
> Hi Biju,
>
> Thank you for the patch.
>
> On Wed, Mar 09, 2022 at 03:11:08PM +0000, Biju Das wrote:
> > On Renesas RZ/{G2L,V2L} platforms changing the lanes from 4 to 3 at
> > lower frequencies causes display instability. On such platforms, it is
> > better to avoid switching lanes from 4 to 3 as it needs different set
> > of PLL parameter constraints to make the display stable with 3 lanes.
>
> Is this because the PLL calculation code doesn't work properly, or because
> the hardware can't support this ?
PLL Calculation is correct, that is the reason it works for all resolution
with 4 lanes. There are 2 clocks generated by PLL5 which is connected to a mux
with clock sources, namely 'FOUTPOSTDIV' and 'FOUT1PH0'
This Mux is connected to DSI dividers.
'FOUTPOSTDIV' should be selected if (PLL_INPUT_FREQ/VCLK) is odd and 'FOUT1PH0' should
be selected if it is even.
The PLL calculation makes use of even selection('FOUT1PH0') and video works for all frequencies
with 4 lanes.
With 'FOUT1PH0' as clock source, if I switch to 3 lanes for lanes it doesn't work.
But it work with 4lanes on all frequencies.
HW can support 3 lanes, if I set parameter to make (PLL_INPUT_FREQ/VCLK) odd and select
'FOUTPOSTDIV' as clk source to DSI divider.
I am not sure about the rational behind the constraint to Switch to 3 lanes for
lower frequency for this ADV7535 chip, as on our platform it can work with 4lanes
on all frequencies.
Cheers,
Biju
>
> > This patch introduces 'adi,disable-lanes-override' property to disable
> > lane switching at lower frequencies.
> >
> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > ---
> > .../devicetree/bindings/display/bridge/adi,adv7533.yaml | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml
> > b/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml
> > index f36209137c8a..2dc378039d21 100644
> > ---
> > a/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml
> > +++ b/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yam
> > +++ l
> > @@ -84,6 +84,11 @@ properties:
> > timings for HDMI output.
> > type: boolean
> >
> > + adi,disable-lanes-override:
> > + description:
> > + Disables the overriding lanes at lower frequencies.
> > + type: boolean
> > +
> > adi,dsi-lanes:
> > description: Number of DSI data lanes connected to the DSI host.
> > $ref: /schemas/types.yaml#/definitions/uint32
>
> --
> Regards,
>
> Laurent Pinchart
