Hi,
Thanks for the review.
Please find the inline comments.
Thanks,
Sajida
> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx>
> Sent: Tuesday, March 1, 2022 5:06 PM
> To: Sajida Bhanu (Temp) (QUIC) <quic_c_sbhanu@xxxxxxxxxxx>;
> adrian.hunter@xxxxxxxxx; ulf.hansson@xxxxxxxxxx; robh+dt@xxxxxxxxxx
> Cc: Asutosh Das (QUIC) <quic_asutoshd@xxxxxxxxxxx>; Ram Prakash Gupta
> (QUIC) <quic_rampraka@xxxxxxxxxxx>; Pradeep Pragallapati (QUIC)
> <quic_pragalla@xxxxxxxxxxx>; Sarthak Garg (QUIC)
> <quic_sartgarg@xxxxxxxxxxx>; Nitin Rawat (QUIC)
> <quic_nitirawa@xxxxxxxxxxx>; Sayali Lokhande (QUIC)
> <quic_sayalil@xxxxxxxxxxx>; agross@xxxxxxxxxx;
> bjorn.andersson@xxxxxxxxxx; linux-arm-msm@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx
> Subject: Re: [PATCH V1] arm64: dts: qcom: sc7280: Add GCC hardware
> register dt entry
>
> On 01/03/2022 12:12, Shaik Sajida Bhanu wrote:
> > Add GCC hardware register dt entry for eMMC and SD card.
>
> Aren't you adding reset, not a hardware register? The same in subject.
>
Sure will update.
> >
> > Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@xxxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > index c07765d..2b8461d 100644
> > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > @@ -881,6 +881,9 @@
> > mmc-hs400-1_8v;
> > mmc-hs400-enhanced-strobe;
> >
> > + /* Add dt entry for gcc hw reset */
>
> This comment seems unrelated and duplicating commit msg. Basically you
> wrote same sentence four times: subject, commit msg and twice here...
Sure will update
>
> > + resets = <&gcc GCC_SDCC1_BCR>;
> > + reset-names = "core_reset";
> > sdhc1_opp_table: opp-table {
> > compatible = "operating-points-v2";
> >
> > @@ -2686,6 +2689,9 @@
> >
> > qcom,dll-config = <0x0007642c>;
> >
> > + /* Add dt entry for gcc hw reset */
>
> Ditto.
>
> > + resets = <&gcc GCC_SDCC2_BCR>;
> > + reset-names = "core_reset";
> > sdhc2_opp_table: opp-table {
> > compatible = "operating-points-v2";
> >
>
>
> Best regards,
> Krzysztof
