On Fri, Mar 04, 2022 at 05:15:08PM +0100, Alexandre Bailon wrote: > This adds dt bindings for the APU present in the MT8183. > > Signed-off-by: Alexandre Bailon <abailon@xxxxxxxxxxxx> > --- > .../bindings/remoteproc/mtk,apu.yaml | 122 ++++++++++++++++++ > 1 file changed, 122 insertions(+) > create mode 100644 Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml > > diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml > new file mode 100644 > index 000000000000..b640aa96d678 > --- /dev/null > +++ b/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml > @@ -0,0 +1,122 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > + > +--- > +$id: "http://devicetree.org/schemas/remoteproc/mtk,apu.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Mediatek AI Processor Unit (APU) > + > +description: > + This document defines the binding for the APU, a co-processor that could > + offload the CPU for machine learning and neural network. > + > +maintainers: > + - Alexandre Bailon <abailon@xxxxxxxxxxxx> > + > +properties: > + compatible: > + const: mediatek,mt8183-apu > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + minItems: 3 > + maxItems: 3 > + > + clock-names: > + items: > + - const: axi > + - const: ipu > + - const: jtag > + > + iommus: > + maxItems: 3 > + > + memory-region: > + maxItems: 3 > + > + memory-region-da: > + description: > + Array of APU device address. This is used to map the APU device address > + to a physical address. > + maxItems: 3 'dma-ranges' should work for this. > + > + power-domains: > + maxItems: 1 > + > + pinctrl: > + description: pinctrl handles, required to configure pins for JTAG. > + > + pinctrl-names: > + items: > + - const: jtag > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - iommus > + - memory-region > + - memory-region-da > + - power-domains > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/mt8183-clk.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/memory/mt8183-larb-port.h> > + #include <dt-bindings/power/mt8183-power.h> > + > + reserved-memory { > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + vdev0buffer: vdev0buffer@52900000 { > + compatible = "shared-dma-pool"; > + reg = <0x52900000 0x4000>; > + no-map; > + }; > + > + vdev0vring0: vdev0vring0@52904000 { > + compatible = "shared-dma-pool"; > + reg = <0x52904000 0x2000>; > + no-map; > + }; > + > + vdev0vring1: vdev0vring1@52906000 { > + compatible = "shared-dma-pool"; > + reg = <0x52906000 0x2000>; > + no-map; > + }; > + }; > + > + apu0: apu@19100000 { > + compatible = "mediatek,mt8183-apu"; > + reg = <0x19180000 0x14000>; > + interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_LOW>; > + > + iommus = <&iommu M4U_PORT_IMG_IPUO>, > + <&iommu M4U_PORT_IMG_IPU3O>, > + <&iommu M4U_PORT_IMG_IPUI>; > + > + clocks = <&ipu_core0 CLK_IPU_CORE0_AXI>, > + <&ipu_core0 CLK_IPU_CORE0_IPU>, > + <&ipu_core0 CLK_IPU_CORE0_JTAG>; > + > + clock-names = "axi", "ipu", "jtag"; > + > + power-domains = <&scpsys MT8183_POWER_DOMAIN_VPU_CORE0>; > + memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>; > + memory-region-da = <0x6fff8000>, <0x6fffc000>, <0x6fffe000>; > + }; > +... > -- > 2.34.1 > >