Hi Biju,
On Thu, Mar 3, 2022 at 5:26 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> Define RZ/G2UL (R9A07G043U) Clock Pulse Generator Core Clock and module
> clock outputs, as listed in Table 7.1.4.2 ("Clock List r0.51") and also
> add Reset definitions referring to registers CPG_RST_* in Section 7.2.3
> ("Register configuration") of the RZ/G2UL Hardware User's Manual (Rev.
> 0.51, Nov. 2021).
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
Thanks for your patch!
> --- /dev/null
> +++ b/include/dt-bindings/clock/r9a07g043u-cpg.h
> @@ -0,0 +1,186 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> + *
> + * Copyright (C) 2022 Renesas Electronics Corp.
> + */
> +#ifndef __DT_BINDINGS_CLOCK_R9A07G043U_CPG_H__
> +#define __DT_BINDINGS_CLOCK_R9A07G043U_CPG_H__
> +
> +#include <dt-bindings/clock/renesas-cpg-mssr.h>
> +
> +/* R9A07G043U CPG Core Clocks */
> +#define R9A07G043U_CLK_I 0
Likewise, please drop the trailing (upper/lower case) "u".
Unfortunately I cannot comment on the list of clocks, as I don't have
access to that part of the documentation yet.
I think it would be good to compare the RZ/G2UL and RZ/Five clock
lists, so we know if we can handle them in a common driver, possibly
even sharing binding definitions, or need to differentiate.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
