On 03.03.2022 18:03, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> The YAML binding (crypto/atmel,at91sam9g46-aes.yaml) mandates the order
> of the channels. Swap them to pass devicetree validation.
>
> Fixes: 290deaa10c50 ("ARM: dts: add DT for lan966 SoC and 2-port board pcb8291")
> Signed-off-by: Michael Walle <michael@xxxxxxxx>
Reviewed-by: Claudiu Beznea <claudiu.beznea@xxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/lan966x.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 7d2869648050..5e9cbc8cdcbc 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -114,9 +114,9 @@ aes: crypto@e004c000 {
> compatible = "atmel,at91sam9g46-aes";
> reg = <0xe004c000 0x100>;
> interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
> - dmas = <&dma0 AT91_XDMAC_DT_PERID(13)>,
> - <&dma0 AT91_XDMAC_DT_PERID(12)>;
> - dma-names = "rx", "tx";
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
> + <&dma0 AT91_XDMAC_DT_PERID(13)>;
> + dma-names = "tx", "rx";
> clocks = <&nic_clk>;
> clock-names = "aes_clk";
> };
> --
> 2.30.2
>
