On Thu, 3 Mar 2022 at 12:40, Vinod Polimera <quic_vpolimer@xxxxxxxxxxx> wrote:
>
> Kernel clock driver assumes that initial rate is the
> max rate for that clock and was not allowing it to scale
> beyond the assigned clock value.
>
> Drop the assigned clock rate property and vote on the mdp clock as per
> calculated value during the usecase.
>
> Fixes: 7c1dffd471("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
Please remove the Fixes tags from all commits. Otherwise the patches
might be picked up into earlier kernels, which do not have a patch
adding a vote on the MDP clock.
> Signed-off-by: Vinod Polimera <quic_vpolimer@xxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 ++-------
> 1 file changed, 2 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index fdaf303..2105eb7 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -3164,9 +3164,6 @@
> <&dispcc DISP_CC_MDSS_MDP_CLK>;
> clock-names = "iface", "bus", "nrt_bus", "core";
>
> - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
> - assigned-clock-rates = <460000000>;
> -
> interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-controller;
> #interrupt-cells = <1>;
> @@ -3191,10 +3188,8 @@
> <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
> clock-names = "iface", "bus", "core", "vsync";
>
> - assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
> - <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
> - assigned-clock-rates = <460000000>,
> - <19200000>;
> + assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
> + assigned-clock-rates = <19200000>;
>
> operating-points-v2 = <&mdp_opp_table>;
> power-domains = <&rpmhpd SM8250_MMCX>;
> --
> 2.7.4
>
--
With best wishes
Dmitry
