On Friday 05 September 2014 13:39:42 Murali Karicheri wrote: > + > /* enable RC mode in devcfg */ > val = readl(reg_p); > - val &= ~PCIE_MODE_MASK; > - val |= PCIE_RC_MODE; > + port_id <<= 1; > + val &= ~(PCIE_MODE_MASK << port_id); > + val |= (PCIE_RC_MODE << port_id); > writel(val, reg_p); > + devm_iounmap(dev, reg_p); > + devm_release_mem_region(dev, res->start, resource_size(res)); This looks like it's a shared register of some sort that doesn't really belong into the registers of a particular port. Could it be that it's actually for the PHY? Arnd -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
