On Thu, Feb 24, 2022 at 03:47:28PM +0800, Medad CChien wrote: > Add the device tree bindings for the EDAC driver npcm-edac. > > Signed-off-by: Medad CChien <ctcchien@xxxxxxxxxxx> > --- > .../devicetree/bindings/edac/npcm-edac.yaml | 64 +++++++++++++++++++ > 1 file changed, 64 insertions(+) > create mode 100644 Documentation/devicetree/bindings/edac/npcm-edac.yaml > > diff --git a/Documentation/devicetree/bindings/edac/npcm-edac.yaml b/Documentation/devicetree/bindings/edac/npcm-edac.yaml > new file mode 100644 > index 000000000000..228ace1025dc > --- /dev/null > +++ b/Documentation/devicetree/bindings/edac/npcm-edac.yaml > @@ -0,0 +1,64 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/edac/npcm-edac.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Nuvoton NPCM Memory Controller EDAC > + > +maintainers: > + - Medad CChien <ctcchien@xxxxxxxxxxx> > + > +description: | > + EDAC node is defined to describe on-chip error detection and correction for > + Nuvoton NPCM Memory Controller. The h/w unit is the memory controller. Describe that in your binding. EDAC is a Linuxism. > + > +properties: > + compatible: > + enum: > + - nuvoton,npcm8xx-edac > + - nuvoton,npcm7xx-edac The h/w manual calls this block 'edac'? > + > + reg: > + maxItems: 1 > + > + "#address-cells": > + const: 2 > + > + "#size-cells": > + const: 2 You don't need these 2. You don't have a child node with an address. > + > + interrupts: > + minItems: 1 > + items: > + - description: uncorrectable error interrupt > + - description: correctable error interrupt > + > + interrupt-names: > + minItems: 1 > + items: > + - const: ue > + - const: ce > + > +required: > + - compatible > + - reg > + - interrupts > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + ahb { > + #address-cells = <2>; > + #size-cells = <2>; > + mc: memory-controller@f0824000 { > + #address-cells = <2>; > + #size-cells = <2>; > + reg = <0x0 0xf0824000 0x0 0x1000>; > + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; > + compatible = "nuvoton,npcm7xx-edac"; > + }; > + }; > + > -- > 2.17.1 > >
