Re: [PATCH v2 1/3] dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator

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On Sat, Feb 19, 2022 at 02:50:01AM +0100, Marek Vasut wrote:
> Add binding for Renesas 9-series PCIe clock generators. This binding
> is designed to support 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ series I2C
> PCIe clock generators, currently the only tested and supported chip
> is 9FGV0241.
> 
> Signed-off-by: Marek Vasut <marex@xxxxxxx>
> Cc: Michael Turquette <mturquette@xxxxxxxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> Cc: Stephen Boyd <sboyd@xxxxxxxxxx>
> Cc: devicetree@xxxxxxxxxxxxxxx
> To: linux-clk@xxxxxxxxxxxxxxx
> ---
> V2: - Drop clock consumer from the binding example
>     - Make clocks, i.e. xtal, mandatory
> ---
>  .../bindings/clock/renesas,9series.yaml       | 96 +++++++++++++++++++
>  1 file changed, 96 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/renesas,9series.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/renesas,9series.yaml b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
> new file mode 100644
> index 0000000000000..8eb56f38d99e9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,9series.yaml
> @@ -0,0 +1,96 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/renesas,9series.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Binding for Renesas 9-series I2C PCIe clock generators
> +
> +description: |
> +  The Renesas 9-series are I2C PCIe clock generators providing
> +  from 1 to 20 output clocks.
> +
> +  When referencing the provided clock in the DT using phandle
> +  and clock specifier, the following mapping applies:
> +
> +  - 9FGV0241:
> +    0 -- DIF0
> +    1 -- DIF1
> +
> +maintainers:
> +  - Marek Vasut <marex@xxxxxxx>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - renesas,9fgv0241
> +
> +  reg:
> +    description: I2C device address
> +    enum: [ 0x68, 0x6a ]
> +
> +  '#clock-cells':
> +    const: 1
> +
> +  clocks:
> +    items:
> +      - description: XTal input clock
> +
> +  renesas,out-amplitude:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [ 600000, 700000, 800000, 900000 ]
> +    description: Output clock signal amplitude in uV

Use the standard unit suffix, -microvolt.

> +
> +  renesas,out-spread-spectrum:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [ 100000, 99750, 99500 ]
> +    description: Output clock down spread in pcm

pcm?

> +
> +patternProperties:
> +  "^DIF[0-19]$":
> +    type: object
> +    description:
> +      Description of one of the outputs (DIF0..DIF19).

blank line

> +    properties:
> +      renesas,slew-rate:
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        enum: [ 2000000, 3000000 ]
> +        description: Output clock slew rate select in V/ns

blank line

> +    additionalProperties: false
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    /* 25MHz reference crystal */
> +    ref25: ref25m {
> +        compatible = "fixed-clock";
> +        #clock-cells = <0>;
> +        clock-frequency = <25000000>;
> +    };
> +
> +    i2c@0 {
> +        reg = <0x0 0x100>;
> +        #address-cells = <1>;
> +        #size-cells = <0>;
> +
> +        rs9: clock-generator@6a {
> +            compatible = "renesas,9fgv0241";
> +            reg = <0x6a>;
> +            #clock-cells = <1>;
> +
> +            clocks = <&ref25m>;
> +
> +            DIF0 {
> +                renesas,slew-rate = <3000000>;
> +            };
> +        };
> +    };
> +
> +...
> -- 
> 2.34.1
> 
> 



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