On Tue, 22 Feb 2022 10:26:21 +0530, Rohit Agarwal wrote: > Add information for Cortex A7 PLL clock in Qualcomm > platform SDX65. > > Signed-off-by: Rohit Agarwal <quic_rohiagar@xxxxxxxxxxx> > --- > Documentation/devicetree/bindings/clock/qcom,a7pll.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Acked-by: Rob Herring <robh@xxxxxxxxxx>
