On Sun, Feb 06, 2022 at 12:33:27PM +0100, Krzysztof Kozlowski wrote: > On 05/02/2022 17:21, Vidya Sagar wrote: > > Add the memory client and stream ID definitions for the PCIe hardware > > found on Tegra234 SoCs. > > I could not find dependencies or merging strategy in cover letter. > Please always describe it, so I don't have to go through all the patches > to figure this out. > > > > > Signed-off-by: Vidya Sagar <vidyas@xxxxxxxxxx> > > --- > > include/dt-bindings/memory/tegra234-mc.h | 64 ++++++++++++++++++++++++ > > 1 file changed, 64 insertions(+) > > > > diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h > > index 2662f70c15c6..60017684858a 100644 > > --- a/include/dt-bindings/memory/tegra234-mc.h > > +++ b/include/dt-bindings/memory/tegra234-mc.h > > @@ -7,15 +7,53 @@ > > #define TEGRA234_SID_INVALID 0x00 > > #define TEGRA234_SID_PASSTHROUGH 0x7f > > > > +/* NISO0 stream IDs */ > > +#define TEGRA234_SID_PCIE0 0x12U > > +#define TEGRA234_SID_PCIE4 0x13U > > +#define TEGRA234_SID_PCIE5 0x14U > > +#define TEGRA234_SID_PCIE6 0x15U > > +#define TEGRA234_SID_PCIE9 0x1FU > > > > /* NISO1 stream IDs */ > > #define TEGRA234_SID_SDMMC4 0x02 > > +#define TEGRA234_SID_PCIE1 0x5U > > +#define TEGRA234_SID_PCIE2 0x6U > > +#define TEGRA234_SID_PCIE3 0x7U > > +#define TEGRA234_SID_PCIE7 0x8U > > +#define TEGRA234_SID_PCIE8 0x9U > > +#define TEGRA234_SID_PCIE10 0xBU > > I don't see usage of these... > > > #define TEGRA234_SID_BPMP 0x10 > > > > /* > > * memory client IDs > > */ > > > > +/* PCIE6 read clients */ > > +#define TEGRA234_MEMORY_CLIENT_PCIE6AR 0x28 > > I see you use them in DTS but not in mc driver. Don't you miss anything > here? This is along the same lines as the APE and HDA patches earlier, so I would expect Vidya to add a memory controller patch that makes use of these once the initial Tegra234 memory controller patch was merged. Meanwhile, I've applied this to the Tegra tree, on top of the other patches that add memory client definitions and resolved the conflicts that ensued. That way, by the time we get around to the next cycle all of these dependencies will exist and applying the memory controller patches should become easier. Thierry
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