Re: [PATCH] ARM: dts: at91: Use the generic "crypto" node name for the crypto IPs

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On 08/02/2022 at 12:12, Tudor Ambarus wrote:
The DT specification recommeds that:
"The name of a node should be somewhat generic, reflecting the function of
the device and not its precise programming model. If appropriate, the name
should be one of the following choices:"
"crypto" being the recommendation for the crypto nodes. Follow the DT
recommendation and use the generic "crypto" node name for the at91 crypto
IPs. While at this, add labels to the crypto nodes where they missed, for
easier reference purposes.

Signed-off-by: Tudor Ambarus <tudor.ambarus@xxxxxxxxxxxxx>

Acked-by: Nicolas Ferre <nicolas.ferre@xxxxxxxxxxxxx>
Adapted to new changes integrated in at91-dt branch and queued for 5.18.

Best regards,
  Nicolas

---
  arch/arm/boot/dts/sam9x60.dtsi | 6 +++---
  arch/arm/boot/dts/sama5d2.dtsi | 6 +++---
  arch/arm/boot/dts/sama5d3.dtsi | 6 +++---
  arch/arm/boot/dts/sama5d4.dtsi | 6 +++---
  4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
index ec45ced3cde6..ec686f617ec7 100644
--- a/arch/arm/boot/dts/sam9x60.dtsi
+++ b/arch/arm/boot/dts/sam9x60.dtsi
@@ -270,7 +270,7 @@ pit64b: timer@f0028000 {
  				clock-names = "pclk", "gclk";
  			};
- sha: sha@f002c000 {
+			sha: crypto@f002c000 {
  				compatible = "atmel,at91sam9g46-sha";
  				reg = <0xf002c000 0x100>;
  				interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -291,7 +291,7 @@ trng: trng@f0030000 {
  				status = "okay";
  			};
- aes: aes@f0034000 {
+			aes: crypto@f0034000 {
  				compatible = "atmel,at91sam9g46-aes";
  				reg = <0xf0034000 0x100>;
  				interrupts = <39 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -307,7 +307,7 @@ AT91_XDMAC_DT_PERID(32))>,
  				status = "okay";
  			};
- tdes: tdes@f0038000 {
+			tdes: crypto@f0038000 {
  				compatible = "atmel,at91sam9g46-tdes";
  				reg = <0xf0038000 0x100>;
  				interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index c700c3b19e4c..51e80611aa02 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -306,7 +306,7 @@ qspi1: spi@f0024000 {
  				status = "disabled";
  			};
- sha@f0028000 {
+			sha: crypto@f0028000 {
  				compatible = "atmel,at91sam9g46-sha";
  				reg = <0xf0028000 0x100>;
  				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -319,7 +319,7 @@ sha@f0028000 {
  				status = "okay";
  			};
- aes@f002c000 {
+			aes: crypto@f002c000 {
  				compatible = "atmel,at91sam9g46-aes";
  				reg = <0xf002c000 0x100>;
  				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -1084,7 +1084,7 @@ pioBU: secumod@fc040000 {
  				#gpio-cells = <2>;
  			};
- tdes@fc044000 {
+			tdes: crypto@fc044000 {
  				compatible = "atmel,at91sam9g46-tdes";
  				reg = <0xfc044000 0x100>;
  				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index d1841bffe3c5..8fa423c52592 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -381,7 +381,7 @@ usart3: serial@f8024000 {
  				status = "disabled";
  			};
- sha@f8034000 {
+			sha: crypto@f8034000 {
  				compatible = "atmel,at91sam9g46-sha";
  				reg = <0xf8034000 0x100>;
  				interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -391,7 +391,7 @@ sha@f8034000 {
  				clock-names = "sha_clk";
  			};
- aes@f8038000 {
+			aes: crypto@f8038000 {
  				compatible = "atmel,at91sam9g46-aes";
  				reg = <0xf8038000 0x100>;
  				interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -402,7 +402,7 @@ aes@f8038000 {
  				clock-names = "aes_clk";
  			};
- tdes@f803c000 {
+			tdes: crypto@f803c000 {
  				compatible = "atmel,at91sam9g46-tdes";
  				reg = <0xf803c000 0x100>;
  				interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index f6e3e6f57252..1dff79a29012 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -673,7 +673,7 @@ adc0: adc@fc034000 {
  				status = "disabled";
  			};
- aes@fc044000 {
+			aes: crypto@fc044000 {
  				compatible = "atmel,at91sam9g46-aes";
  				reg = <0xfc044000 0x100>;
  				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -687,7 +687,7 @@ aes@fc044000 {
  				status = "okay";
  			};
- tdes@fc04c000 {
+			tdes: crypto@fc04c000 {
  				compatible = "atmel,at91sam9g46-tdes";
  				reg = <0xfc04c000 0x100>;
  				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
@@ -701,7 +701,7 @@ tdes@fc04c000 {
  				status = "okay";
  			};
- sha@fc050000 {
+			sha: crypto@fc050000 {
  				compatible = "atmel,at91sam9g46-sha";
  				reg = <0xfc050000 0x100>;
  				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;


--
Nicolas Ferre



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