On 22/02/2022 09:27, conor.dooley@xxxxxxxxxxxxx wrote: > From: Daire McNamara <daire.mcnamara@xxxxxxxxxxxxx> > > Add support for clock configuration on Microchip PolarFire SoC > > Reviewed-by: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> > Tested-by: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> > Co-developed-by: Padmarao Begari <padmarao.begari@xxxxxxxxxxxxx> > Signed-off-by: Padmarao Begari <padmarao.begari@xxxxxxxxxxxxx> > Signed-off-by: Daire McNamara <daire.mcnamara@xxxxxxxxxxxxx> > Co-developed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > --- > drivers/clk/Kconfig | 4 +- > drivers/clk/Makefile | 2 +- > drivers/clk/microchip/Kconfig | 10 + > drivers/clk/microchip/Makefile | 1 + > drivers/clk/microchip/clk-mpfs.c | 381 +++++++++++++++++++++++++++++++ > 5 files changed, 394 insertions(+), 4 deletions(-) > create mode 100644 drivers/clk/microchip/Kconfig > create mode 100644 drivers/clk/microchip/clk-mpfs.c > > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig > index 4a8451f61f37..8dffd2d9ba38 100644 > --- a/drivers/clk/Kconfig > +++ b/drivers/clk/Kconfig > @@ -331,9 +331,6 @@ config COMMON_CLK_PXA > help > Support for the Marvell PXA SoC. > > -config COMMON_CLK_PIC32 > - def_bool COMMON_CLK && MACH_PIC32 > - > config COMMON_CLK_OXNAS > bool "Clock driver for the OXNAS SoC Family" > depends on ARCH_OXNAS || COMPILE_TEST > @@ -408,6 +405,7 @@ source "drivers/clk/keystone/Kconfig" > source "drivers/clk/mediatek/Kconfig" > source "drivers/clk/meson/Kconfig" > source "drivers/clk/mstar/Kconfig" > +source "drivers/clk/microchip/Kconfig" > source "drivers/clk/mvebu/Kconfig" > source "drivers/clk/pistachio/Kconfig" > source "drivers/clk/qcom/Kconfig" > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile > index 6a98291350b6..3b0062746984 100644 > --- a/drivers/clk/Makefile > +++ b/drivers/clk/Makefile > @@ -92,7 +92,7 @@ obj-$(CONFIG_ARCH_KEYSTONE) += keystone/ > obj-$(CONFIG_MACH_LOONGSON32) += loongson1/ > obj-y += mediatek/ > obj-$(CONFIG_ARCH_MESON) += meson/ > -obj-$(CONFIG_MACH_PIC32) += microchip/ > +obj-y += microchip/ > ifeq ($(CONFIG_COMMON_CLK), y) > obj-$(CONFIG_ARCH_MMP) += mmp/ > endif > diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig > new file mode 100644 > index 000000000000..e1af380d8c9c > --- /dev/null > +++ b/drivers/clk/microchip/Kconfig > @@ -0,0 +1,10 @@ > +# SPDX-License-Identifier: GPL-2.0 > + > +config COMMON_CLK_PIC32 > + def_bool COMMON_CLK && MACH_PIC32 > + > +config MCHP_CLK_MPFS > + bool "Clk driver for PolarFire SoC" > + depends on (RISCV && SOC_MICROCHIP_POLARFIRE) || COMPILE_TEST > + help > + Supports Clock Configuration for PolarFire SoC > \ No newline at end of file Missing newline. Best regards, Krzysztof
