Hi Geert, geert@xxxxxxxxxxxxxx wrote on Tue, 22 Feb 2022 11:39:34 +0100: > Hi Miquel, > > On Thu, Dec 16, 2021 at 12:48 PM Miquel Raynal > <miquel.raynal@xxxxxxxxxxx> wrote: > > Some SPI-NAND chips do not support on-die ECC. For these chips, > > correction must apply on the SPI controller end. In order to avoid > > doing all the calculations by software, Macronix provides a specific > > engine that can offload the intensive work. > > > > Add Macronix ECC engine support, this engine can work in conjunction > > with a SPI controller and a raw NAND controller, it can be pipelined > > or external and supports linear and syndrome layouts. > > > > Right now the simplest configuration is supported: SPI controller > > external and linear ECC engine. > > > > Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx> > > Thanks for your patch! > > > --- a/drivers/mtd/nand/Kconfig > > +++ b/drivers/mtd/nand/Kconfig > > @@ -46,6 +46,12 @@ config MTD_NAND_ECC_SW_BCH > > ECC codes. They are used with NAND devices requiring more than 1 bit > > of error correction. > > > > +config MTD_NAND_ECC_MXIC > > + bool "Macronix external hardware ECC engine" > > + select MTD_NAND_ECC > > + help > > + This enables support for the hardware ECC engine from Macronix. > > I guess this is a licensable IP core, which can appear anywhere, so > we don't have a proper platform dependency to add here? Yes, I am not aware of any limitation on that side. Thanks, Miquèl
