Hi Lucas,
Thank you for the patch.
On Mon, Feb 07, 2022 at 08:25:46PM +0100, Lucas Stach wrote:
> Add the power domains for the GPUs, which do not require any interaction with
> a blk-ctrl, but are simply two PU domains nested inside a MIX domain.
>
> Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
Reviewed-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 27 +++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index dc488a147d0c..9ed57171b9fc 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -503,6 +503,33 @@ pgc_usb2_phy: power-domain@3 {
> reg = <IMX8MP_POWER_DOMAIN_USB2_PHY>;
> };
>
> + pgc_gpu2d: power-domain@6 {
> + #power-domain-cells = <0>;
> + reg = <IMX8MP_POWER_DOMAIN_GPU2D>;
> + clocks = <&clk IMX8MP_CLK_GPU2D_ROOT>;
> + power-domains = <&pgc_gpumix>;
> + };
> +
> + pgc_gpumix: power-domain@7 {
> + #power-domain-cells = <0>;
> + reg = <IMX8MP_POWER_DOMAIN_GPUMIX>;
> + clocks = <&clk IMX8MP_CLK_GPU_ROOT>,
> + <&clk IMX8MP_CLK_GPU_AHB>;
> + assigned-clocks = <&clk IMX8MP_CLK_GPU_AXI>,
> + <&clk IMX8MP_CLK_GPU_AHB>;
> + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
> + <&clk IMX8MP_SYS_PLL1_800M>;
> + assigned-clock-rates = <800000000>, <400000000>;
> + };
> +
> + pgc_gpu3d: power-domain@9 {
> + #power-domain-cells = <0>;
> + reg = <IMX8MP_POWER_DOMAIN_GPU3D>;
> + clocks = <&clk IMX8MP_CLK_GPU3D_ROOT>,
> + <&clk IMX8MP_CLK_GPU3D_SHADER_CORE>;
> + power-domains = <&pgc_gpumix>;
> + };
> +
> pgc_hsiomix: power-domains@17 {
> #power-domain-cells = <0>;
> reg = <IMX8MP_POWER_DOMAIN_HSIOMIX>;
>
--
Regards,
Laurent Pinchart
