Hi Noralf, On Fri, Feb 18, 2022 at 04:11:08PM +0100, Noralf Trønnes wrote: > Add binding for MIPI DBI compatible SPI panels. > > v4: > - There should only be two compatible (Maxime) > - s/panel-dbi-spi/panel-mipi-dbi-spi/in compatible > > v3: > - Move properties to Device Tree (Maxime) > - Use contains for compatible (Maxime) > - Add backlight property to example > - Flesh out description > > v2: > - Fix path for panel-common.yaml > - Use unevaluatedProperties > - Drop properties which are in the allOf section > - Drop model property (Rob) > > Acked-by: Maxime Ripard <maxime@xxxxxxxxxx> > Signed-off-by: Noralf Trønnes <noralf@xxxxxxxxxxx> > --- > .../display/panel/panel-mipi-dbi-spi.yaml | 125 ++++++++++++++++++ > 1 file changed, 125 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml > > diff --git a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml > new file mode 100644 > index 000000000000..748c09113168 > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml > @@ -0,0 +1,125 @@ > +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MIPI DBI SPI Panel > + > +maintainers: > + - Noralf Trønnes <noralf@xxxxxxxxxxx> > + > +description: | > + This binding is for display panels using a MIPI DBI compatible controller > + in SPI mode. > + > + The MIPI Alliance Standard for Display Bus Interface defines the electrical > + and logical interfaces for display controllers historically used in mobile > + phones. The standard defines 4 display architecture types and this binding is > + for type 1 which has full frame memory. There are 3 interface types in the > + standard and type C is the serial interface. > + > + The standard defines the following interface signals for type C: > + - Power: > + - Vdd: Power supply for display module > + - Vddi: Logic level supply for interface signals > + Combined into one in this binding called: power-supply > + - Interface: > + - CSx: Chip select > + - SCL: Serial clock > + - Dout: Serial out > + - Din: Serial in > + - SDA: Bidrectional in/out > + - D/CX: Data/command selection, high=data, low=command > + Called dc-gpios in this binding. > + - RESX: Reset when low > + Called reset-gpios in this binding. > + > + The type C interface has 3 options: > + > + - Option 1: 9-bit mode and D/CX as the 9th bit > + | Command | the next command or following data | > + |<0><D7><D6><D5><D4><D3><D2><D1><D0>|<D/CX><D7><D6><D5><D4><D3><D2><D1><D0>| > + > + - Option 2: 16-bit mode and D/CX as a 9th bit > + | Command or data | > + |<X><X><X><X><X><X><X><D/CX><D7><D6><D5><D4><D3><D2><D1><D0>| > + > + - Option 3: 8-bit mode and D/CX as a separate interface line > + | Command or data | > + |<D7><D6><D5><D4><D3><D2><D1><D0>| > + > + The panel resolution is specified using the panel-timing node properties > + hactive (width) and vactive (height). The other mandatory panel-timing > + properties should be set to zero except clock-frequency which can be > + optionally set to inform about the actual pixel clock frequency. > + > + If the panel is wired to the controller at an offset specify this using > + hback-porch (x-offset) and vback-porch (y-offset). Very informative description - well done. > + > +allOf: > + - $ref: panel-common.yaml# > + - $ref: /schemas/spi/spi-peripheral-props.yaml# > + > +properties: > + compatible: > + items: > + - {} # Panel Specific Compatible > + - const: panel-mipi-dbi-spi > + > + write-only: > + type: boolean > + description: > + Controller is not readable (ie. MISO is not wired up). It would be easier to understand if this comment refers to one of the pins on the display described above. So maybe something like (ie. Din (MSIO on the SPI interface) is not wired up). With the comment updated to include a reference to Din, Acked-by: Sam Ravnborg <sam@xxxxxxxxxxxx>
