From: suijingfeng <suijingfeng@xxxxxxxxxxx>
This board has a VGA output and a DVI output, the VGA is connected to
the DVO0 of the display controller and the DVI is connected to DVO1 of
the display controller.
+------+ +-----------------------------------+
| DDR4 | | +-------------------+ |
+------+ | | PCIe Root complex | LS7A1000 |
|| MC0 | +--++---------++----+ |
+----------+ HT 3.0 | || || |
| LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+
| CPU |<-------->| | GC1000 | | LSDC |<-->| DDR3 MC |<->| VRAM |
+----------+ | +--------+ +-+--+-+ +---------+ +------+
|| MC1 +---------------|--|----------------+
+------+ | |
| DDR4 | +-------+ DVO0 | | DVO1 +------+
+------+ VGA <--|ADV7125|<--------+ +-------->|TFP410|--> DVI/HDMI
+-------+ +------+
Signed-off-by: suijingfeng <suijingfeng@xxxxxxxxxxx>
Signed-off-by: Sui Jingfeng <15330273260@xxxxxx>
---
.../boot/dts/loongson/ls3a4000_7a1000_evb.dts | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
create mode 100644 arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts
diff --git a/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts b/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts
new file mode 100644
index 000000000000..38abe8249e05
--- /dev/null
+++ b/arch/mips/boot/dts/loongson/ls3a4000_7a1000_evb.dts
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/dts-v1/;
+
+#include "loongson64g-package.dtsi"
+#include "ls7a-pch.dtsi"
+
+/ {
+ model = "LS3A4000_7A1000_EVB_BOARD_V1_4";
+};
+
+&package0 {
+ htvec: interrupt-controller@efdfb000080 {
+ compatible = "loongson,htvec-1.0";
+ reg = <0xefd 0xfb000080 0x40>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&liointc>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
+ <25 IRQ_TYPE_LEVEL_HIGH>,
+ <26 IRQ_TYPE_LEVEL_HIGH>,
+ <27 IRQ_TYPE_LEVEL_HIGH>,
+ <28 IRQ_TYPE_LEVEL_HIGH>,
+ <29 IRQ_TYPE_LEVEL_HIGH>,
+ <30 IRQ_TYPE_LEVEL_HIGH>,
+ <31 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
+
+&pch {
+ msi: msi-controller@2ff00000 {
+ compatible = "loongson,pch-msi-1.0";
+ reg = <0 0x2ff00000 0 0x8>;
+ interrupt-controller;
+ msi-controller;
+ loongson,msi-base-vec = <64>;
+ loongson,msi-num-vecs = <192>;
+ interrupt-parent = <&htvec>;
+ };
+};
+
+&lsdc {
+ output-ports = <&dvo0 &dvo1>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dvo0: dvo@0 {
+ reg = <0>;
+ connector = "vga-connector";
+ status = "okay";
+ };
+
+ dvo1: dvo@1 {
+ reg = <1>;
+ connector = "dvi-connector";
+ digital;
+ status = "okay";
+ };
+};
--
2.25.1
