Cause i.MX GPT dts example cannot match i.MX8 chip series. So add NXP i.MX8MM chip GPT input capture function example to yaml file. Signed-off-by: Kane Jiang <jian.jiang@xxxxxxx> --- .../devicetree/bindings/timer/fsl,imxgpt.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml index a4f51f46b7a1..917c1d9516cc 100644 --- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml +++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml @@ -58,6 +58,29 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx8mm-gpt + then: + properties: + reg: + maxItems: 2 + interrupts: + maxItems: 2 + clocks: + items: + - description: SoC GPT ipg clock + - description: SoC GPT per clock + - description: SoC GPT osc per clock + clock-names: + items: + - const: ipg + - const: per + - const: osc_per + examples: - | #include <dt-bindings/clock/imx27-clock.h> @@ -70,3 +93,28 @@ examples: <&clks IMX27_CLK_PER1_GATE>; clock-names = "ipg", "per"; }; + + - | + #include <dt-bindings/clock/imx8mm-clock.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + pinctrl_gpt_input_capture0: gptinputcapture0grp { + fsl,pins = <0x1CC 0x434 0x000 0x1 0x0 0xd6>; + }; + + gpt1: gpt@302d0000 { + compatible = "fsl,imx8mm-gpt"; + reg = <0x0 0x302d0000 0x0 0x10000>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_GPT1_ROOT>, + <&clk IMX8MM_CLK_GPT1_ROOT>, + <&clk IMX8MM_CLK_GPT_3M>; + clock-names = "ipg", "per", "osc_per"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpt_input_capture0>; + }; + }; -- 2.25.1