Am Montag, 7. Februar 2022, 20:25:47 CET schrieb Lucas Stach:
> Add the DT nodes for both the 3D and 2D GPU cores found on the i.MX8MP.
>
> etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6204
> etnaviv-gpu 38008000.gpu: model: GC520, revision: 5341
> [drm] Initialized etnaviv 1.3.0 20151214 for etnaviv on minor 0
Got this on my machine as well:
[ 11.538880] etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6204
[ 11.566889] etnaviv-gpu 38008000.gpu: model: GC520, revision: 5341
[ 11.575804] [drm] Initialized etnaviv 1.3.0 20151214 for etnaviv on minor 0
I've yet to test some GPU load though.
Best regards,
Alexander
> Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 31 +++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index
> 9ed57171b9fc..c89acb53be4a 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -958,6 +958,37 @@ eqos: ethernet@30bf0000 {
> };
> };
>
> + gpu3d: gpu@38000000 {
> + compatible = "vivante,gc";
> + reg = <0x38000000 0x8000>;
> + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MP_CLK_GPU3D_ROOT>,
> + <&clk
IMX8MP_CLK_GPU3D_SHADER_CORE>,
> + <&clk IMX8MP_CLK_GPU_ROOT>,
> + <&clk IMX8MP_CLK_GPU_AHB>;
> + clock-names = "core", "shader", "bus", "reg";
> + assigned-clocks = <&clk
IMX8MP_CLK_GPU3D_CORE>,
> + <&clk
IMX8MP_CLK_GPU3D_SHADER_CORE>;
> + assigned-clock-parents = <&clk
IMX8MP_SYS_PLL1_800M>,
> + <&clk
IMX8MP_SYS_PLL1_800M>;
> + assigned-clock-rates = <800000000>,
<800000000>;
> + power-domains = <&pgc_gpu3d>;
> + };
> +
> + gpu2d: gpu@38008000 {
> + compatible = "vivante,gc";
> + reg = <0x38008000 0x8000>;
> + interrupts = <GIC_SPI 25
IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MP_CLK_GPU2D_ROOT>,
> + <&clk IMX8MP_CLK_GPU_ROOT>,
> + <&clk IMX8MP_CLK_GPU_AHB>;
> + clock-names = "core", "bus", "reg";
> + assigned-clocks = <&clk
IMX8MP_CLK_GPU2D_CORE>;
> + assigned-clock-parents = <&clk
IMX8MP_SYS_PLL1_800M>;
> + assigned-clock-rates = <800000000>;
> + power-domains = <&pgc_gpu2d>;
> + };
> +
> gic: interrupt-controller@38800000 {
> compatible = "arm,gic-v3";
> reg = <0x38800000 0x10000>,
