Quoting Ulrich Hecht (2014-08-28 08:11:11)
> From: Ulrich Hecht <ulrich.hecht@xxxxxxxxx>
>
> Support for setting the parent at initialization time based on the current
> hardware configuration in DIV6 clocks with selectable parents as found in
> the r8a73a4, r8a7740, sh73a0, and other SoCs.
<snip>
> - parent_name = of_clk_get_parent_name(np, 0);
> + if (!of_property_read_u32(np, "renesas,src-shift", &src_shift)) {
> + if (!of_property_read_u32(np, "renesas,src-width",
> + &src_width)) {
> + unsigned int parent_idx =
> + (clk_readl(clock->reg) >> src_shift) &
> + (BIT(src_width) - 1);
> + parent_name = of_clk_get_parent_name(np, parent_idx);
Can the clock source be selected at run-time? Is there a use case for
this?
If so it is probably better to actually model these clocks as
multiplexers with the corresponding .get_parent and .set_parent
callbacks.
Regards,
Mike
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