Hi all, This series adds support for the watchdog timers of the RZ/N1. The watchdog driver (rzn1-wdt.c) is derived from the driver available at https://github.com/renesas-rz/rzn1_linux.git with a few modifications (devm watchdog API usage and WDIOF_MAGICCLOSE option) In order to be able to reset the board when a watchdog timer expires, the RSTEN register must be configured. This is done in the clock driver of the r9a06g032. The rationnal is that this driver is the only one that handles the sysctrl for this platform and there are a couple of other clock drivers that also handle resets/reboot. I intend to later post another patch to add software-triggered reboot capability that will leverage this change. Jean-Jacques Hiblot (5): clk: renesas: r9a06g032: Enable the watchdog reset sources dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock dt-bindings: watchdog: renesas,wdt: Add support for RZ/N1 ARM: dts: r9a06g032: Add the watchdog nodes ARM: dts: r9a06g032-rzn1d400-db: Enable watchdog0 with a 10s timeout Phil Edworthy (1): watchdog: Add Renesas RZ/N1 Watchdog driver .../bindings/watchdog/renesas,wdt.yaml | 4 + arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts | 5 + arch/arm/boot/dts/r9a06g032.dtsi | 16 ++ drivers/clk/renesas/r9a06g032-clocks.c | 33 +++ drivers/watchdog/Kconfig | 8 + drivers/watchdog/Makefile | 1 + drivers/watchdog/rzn1_wdt.c | 197 ++++++++++++++++++ include/dt-bindings/clock/r9a06g032-sysctrl.h | 1 + 8 files changed, 265 insertions(+) create mode 100644 drivers/watchdog/rzn1_wdt.c -- 2.25.1
