On Fri, Feb 04, 2022 at 03:59:35PM +0530, Krishna Yarlagadda wrote: > + nvidia,cmb-xfer: > + description: > + Enable combined sequence transfers for read and program sequence > + if supported by hardware. Tegra194 and later chips support this > + feature. Default is non combined sequence. SPI message should > + contain CMD-ADDR-DATA transfers to combine and send to hardware. > + type: boolean Why is this a DT property - why would systems not wish to use this feature if it is available?
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