Re: [PATCH] ARM: dts: bcm2837: Add the missing L1/L2 cache information

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On 1/31/2022 4:24 PM, Florian Fainelli wrote:
On Sat, 18 Dec 2021 21:00:09 +0100, Richard Schleich <rs@xxxxxxxxxxx> wrote:
This patch fixes the kernel warning
"cacheinfo: Unable to detect cache hierarchy for CPU 0"
for the bcm2837 on newer kernel versions.

Signed-off-by: Richard Schleich <rs@xxxxxxxxxxx>
---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!

I did remove the comments that were not helpful for the 'd-cache-size', 'd-cache-line-size', 'i-cache-size' and 'i-cache-line-size' since they are self explanatory.

Thanks!
--
Florian



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