Hi, Yongqiang:
Yongqiang Niu <yongqiang.niu@xxxxxxxxxxxx> 於 2022年1月28日 週五 下午8:07寫道：
>
> Add mtk mutex support for MT8186 SoC.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@xxxxxxxxxxxx>
> ---
> drivers/soc/mediatek/mtk-mutex.c | 45 ++++++++++++++++++++++++++++++++
> 1 file changed, 45 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
> index 2ca55bb5a8be..ebd95fd0f36e 100644
> --- a/drivers/soc/mediatek/mtk-mutex.c
> +++ b/drivers/soc/mediatek/mtk-mutex.c
> @@ -26,6 +26,23 @@
>
> #define INT_MUTEX BIT(1)
>
> +#define MT8186_MUTEX_MOD_DISP_OVL0 0
> +#define MT8186_MUTEX_MOD_DISP_OVL0_2L 1
> +#define MT8186_MUTEX_MOD_DISP_RDMA0 2
> +#define MT8186_MUTEX_MOD_DISP_COLOR0 4
> +#define MT8186_MUTEX_MOD_DISP_CCORR0 5
> +#define MT8186_MUTEX_MOD_DISP_AAL0 7
> +#define MT8186_MUTEX_MOD_DISP_GAMMA0 8
> +#define MT8186_MUTEX_MOD_DISP_POSTMASK0 9
> +#define MT8186_MUTEX_MOD_DISP_DITHER0 10
> +#define MT8186_MUTEX_MOD_DISP_RDMA1 17
> +
> +#define MT8186_MUTEX_SOF_SINGLE_MODE 0
> +#define MT8186_MUTEX_SOF_DSI0 1
> +#define MT8186_MUTEX_SOF_DPI0 2
> +#define MT8186_MUTEX_EOF_DSI0 (MT8186_MUTEX_SOF_DSI0 << 6)
> +#define MT8186_MUTEX_EOF_DPI0 (MT8186_MUTEX_SOF_DPI0 << 6)
> +
> #define MT8167_MUTEX_MOD_DISP_PWM 1
> #define MT8167_MUTEX_MOD_DISP_OVL0 6
> #define MT8167_MUTEX_MOD_DISP_OVL1 7
> @@ -226,6 +243,19 @@ static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0,
> };
>
> +static const unsigned int mt8186_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> + [DDP_COMPONENT_AAL0] = MT8186_MUTEX_MOD_DISP_AAL0,
> + [DDP_COMPONENT_CCORR] = MT8186_MUTEX_MOD_DISP_CCORR0,
> + [DDP_COMPONENT_COLOR0] = MT8186_MUTEX_MOD_DISP_COLOR0,
> + [DDP_COMPONENT_DITHER] = MT8186_MUTEX_MOD_DISP_DITHER0,
> + [DDP_COMPONENT_GAMMA] = MT8186_MUTEX_MOD_DISP_GAMMA0,
> + [DDP_COMPONENT_OVL0] = MT8186_MUTEX_MOD_DISP_OVL0,
> + [DDP_COMPONENT_OVL_2L0] = MT8186_MUTEX_MOD_DISP_OVL0_2L,
> + [DDP_COMPONENT_POSTMASK0] = MT8186_MUTEX_MOD_DISP_POSTMASK0,
> + [DDP_COMPONENT_RDMA0] = MT8186_MUTEX_MOD_DISP_RDMA0,
> + [DDP_COMPONENT_RDMA1] = MT8186_MUTEX_MOD_DISP_RDMA1,
> +};
> +
> static const unsigned int mt8192_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> [DDP_COMPONENT_AAL0] = MT8192_MUTEX_MOD_DISP_AAL0,
> [DDP_COMPONENT_CCORR] = MT8192_MUTEX_MOD_DISP_CCORR0,
> @@ -264,6 +294,12 @@ static const unsigned int mt8183_mutex_sof[MUTEX_SOF_DSI3 + 1] = {
> [MUTEX_SOF_DPI0] = MT8183_MUTEX_SOF_DPI0 | MT8183_MUTEX_EOF_DPI0,
> };
>
> +static const unsigned int mt8186_mutex_sof[MUTEX_SOF_DSI3 + 1] = {
> + [MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> + [MUTEX_SOF_DSI0] = MT8186_MUTEX_SOF_DSI0 | MT8186_MUTEX_EOF_DSI0,
> + [MUTEX_SOF_DPI0] = MT8186_MUTEX_SOF_DPI0 | MT8186_MUTEX_EOF_DPI0,
> +};
> +
> static const struct mtk_mutex_data mt2701_mutex_driver_data = {
> .mutex_mod = mt2701_mutex_mod,
> .mutex_sof = mt2712_mutex_sof,
> @@ -301,6 +337,13 @@ static const struct mtk_mutex_data mt8183_mutex_driver_data = {
> .no_clk = true,
> };
>
> +static const struct mtk_mutex_data mt8186_mutex_driver_data = {
> + .mutex_mod = mt8186_mutex_mod,
> + .mutex_sof = mt8186_mutex_sof,
> + .mutex_mod_reg = MT8183_MUTEX0_MOD0,
> + .mutex_sof_reg = MT8183_MUTEX0_SOF0,
> +};
> +
> static const struct mtk_mutex_data mt8192_mutex_driver_data = {
> .mutex_mod = mt8192_mutex_mod,
> .mutex_sof = mt8183_mutex_sof,
> @@ -540,6 +583,8 @@ static const struct of_device_id mutex_driver_dt_match[] = {
> .data = &mt8173_mutex_driver_data},
> { .compatible = "mediatek,mt8183-disp-mutex",
> .data = &mt8183_mutex_driver_data},
> + { .compatible = "mediatek,mt8186-disp-mutex",
Add "mediatek,mt8186-disp-mutex" to binding document.
Regards,
Chun-Kuang.
> + .data = &mt8186_mutex_driver_data},
> { .compatible = "mediatek,mt8192-disp-mutex",
> .data = &mt8192_mutex_driver_data},
> {},
> --
> 2.25.1
>
