Hi Peter,
On 1/27/22 02:00, Peter Geis wrote:
> Several io power domains on the Quartz64-A operate at 1.8v.
> Add the pmu_io_domains definition to enable support for this.
> This permits the enablement of the following features:
> sdio - wifi support
> sdhci - mmc-hs200-1_8v
>
> Signed-off-by: Peter Geis <pgwipeout@xxxxxxxxx>
> ---
> arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> index d9eb92d59099..33c2c18caaa9 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> @@ -482,6 +482,19 @@ vcc_sd_h: vcc-sd-h {
> };
> };
>
https://files.pine64.org/doc/quartz64/Quartz64_model-A_schematic_v2.0_20210427.pdf
Could you check with the IO Power Domain Map?
> +&pmu_io_domains {
> + pmuio1-supply = <&vcc3v3_pmu>;
VCC3V3_PMU
> + pmuio2-supply = <&vcc3v3_pmu>;
VCC3V3_PMU
> + vccio1-supply = <&vccio_acodec>;
VCCIO_ACODEC
> + vccio2-supply = <&vcc_1v8>;
VCC_1V8
> + vccio3-supply = <&vccio_sd>;
VCCIO_SD
> + vccio4-supply = <&vcc_1v8>;
==> VCC1V8_PMU
> + vccio5-supply = <&vcc_3v3>;
==> VCC_1V8
> + vccio6-supply = <&vcc1v8_dvp>;
VCC1V8_DVP
> + vccio7-supply = <&vcc_3v3>;
VCC_3V3
> + status = "okay";
> +};
> +
> &sdhci {
> bus-width = <8>;
> mmc-hs200-1_8v;
