Hi Alim, Am 21.01.22 um 18:28 schrieb Alim Akhtar: > Add initial device tree support for "Full Self-Driving" (FSD) SoC > This SoC contain three clusters of four cortex-a72 CPUs and various > peripheral IPs. > > Cc: linux-fsd@xxxxxxxxx > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx> > Signed-off-by: Arjun K V <arjun.kv@xxxxxxxxxxx> > Signed-off-by: Aswani Reddy <aswani.reddy@xxxxxxxxxxx> > Signed-off-by: Ajay Kumar <ajaykumar.rs@xxxxxxxxxxx> > Signed-off-by: Sriranjani P <sriranjani.p@xxxxxxxxxxx> > Signed-off-by: Chandrasekar R <rcsekar@xxxxxxxxxxx> > Signed-off-by: Shashank Prashar <s.prashar@xxxxxxxxxxx> > Signed-off-by: Alim Akhtar <alim.akhtar@xxxxxxxxxxx> > --- > MAINTAINERS | 8 + > arch/arm64/Kconfig.platforms | 6 + > arch/arm64/boot/dts/Makefile | 1 + > arch/arm64/boot/dts/tesla/Makefile | 3 + > arch/arm64/boot/dts/tesla/fsd-evb.dts | 39 ++ > arch/arm64/boot/dts/tesla/fsd.dtsi | 651 ++++++++++++++++++++++++++ > 6 files changed, 708 insertions(+) > create mode 100644 arch/arm64/boot/dts/tesla/Makefile > create mode 100644 arch/arm64/boot/dts/tesla/fsd-evb.dts > create mode 100644 arch/arm64/boot/dts/tesla/fsd.dtsi > > diff --git a/MAINTAINERS b/MAINTAINERS > index 27730a5a6345..ed1c10c26e5b 100644 > diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi > new file mode 100644 > index 000000000000..9a2b88f58c13 > --- /dev/null > +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi > @@ -0,0 +1,651 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Tesla Full Self-Driving SoC device tree source > + * > + * Copyright (c) 2017-2022 Samsung Electronics Co., Ltd. > + * https://www.samsung.com > + * Copyright (c) 2017-2022 Tesla, Inc. > + * https://www.tesla.com > + */ > + > +#include <dt-bindings/clock/fsd-clk.h> > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { ... > + pwm_1: pwm@14110000 { > + compatible = "samsung,exynos4210-pwm"; > + reg = <0x0 0x14110000 0x0 0x100>; > + samsung,pwm-outputs = <0>, <1>, <2>, <3>; > + #pwm-cells = <3>; > + clocks = <&clock_peric PERIC_PWM1_IPCLKPORT_I_PCLK_S0>; > + clock-names = "timers"; > + status = "disabled"; > + }; > + > + hsi2c_0: hsi2c@14200000 { since this is a i2c interface the node name should be changed to i2c: hi2c_0: i2c@... and the following ones. > + compatible = "samsung,exynos7-hsi2c"; > + reg = <0x0 0x14200000 0x0 0x1000>; > + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hs_i2c0_bus>; > + clocks = <&clock_peric PERIC_PCLK_HSI2C0>; > + clock-names = "hsi2c"; > + status = "disabled"; > + }; > + > + hsi2c_1: hsi2c@14210000 { > + compatible = "samsung,exynos7-hsi2c"; > + reg = <0x0 0x14210000 0x0 0x1000>; > + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hs_i2c1_bus>; > + clocks = <&clock_peric PERIC_PCLK_HSI2C1>; > + clock-names = "hsi2c"; > + status = "disabled"; > + }; > + > + hsi2c_2: hsi2c@14220000 { > + compatible = "samsung,exynos7-hsi2c"; > + reg = <0x0 0x14220000 0x0 0x1000>; > + interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hs_i2c2_bus>; > + clocks = <&clock_peric PERIC_PCLK_HSI2C2>; > + clock-names = "hsi2c"; > + status = "disabled"; > + }; > + > + hsi2c_3: hsi2c@14230000 { > + compatible = "samsung,exynos7-hsi2c"; > + reg = <0x0 0x14230000 0x0 0x1000>; > + interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hs_i2c3_bus>; > + clocks = <&clock_peric PERIC_PCLK_HSI2C3>; > + clock-names = "hsi2c"; > + status = "disabled"; > + }; > + > + hsi2c_4: hsi2c@14240000 { > + compatible = "samsung,exynos7-hsi2c"; > + reg = <0x0 0x14240000 0x0 0x1000>; > + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hs_i2c4_bus>; > + clocks = <&clock_peric PERIC_PCLK_HSI2C4>; > + clock-names = "hsi2c"; > + status = "disabled"; > + }; > + > + hsi2c_5: hsi2c@14250000 { > + compatible = "samsung,exynos7-hsi2c"; > + reg = <0x0 0x14250000 0x0 0x1000>; > + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hs_i2c5_bus>; > + clocks = <&clock_peric PERIC_PCLK_HSI2C5>; > + clock-names = "hsi2c"; > + status = "disabled"; > + }; > + > + hsi2c_6: hsi2c@14260000 { > + compatible = "samsung,exynos7-hsi2c"; > + reg = <0x0 0x14260000 0x0 0x1000>; > + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hs_i2c6_bus>; > + clocks = <&clock_peric PERIC_PCLK_HSI2C6>; > + clock-names = "hsi2c"; > + status = "disabled"; > + }; > + > + hsi2c_7: hsi2c@14270000 { > + compatible = "samsung,exynos7-hsi2c"; > + reg = <0x0 0x14270000 0x0 0x1000>; > + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hs_i2c7_bus>; > + clocks = <&clock_peric PERIC_PCLK_HSI2C7>; > + clock-names = "hsi2c"; > + status = "disabled"; > + }; > + }; > +};