On Tue, 2022-01-18 at 19:24 -0500, Sean Anderson wrote:
> These clocks are not used by the dwc3-xilinx driver except to
> enable/disable them. Move them to the dwc3 node so its driver can use
> them to configure the reference clock period.
>
> Signed-off-by: Sean Anderson <sean.anderson@xxxxxxxx>
> ---
>
> (no changes since v1)
>
> arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 4 ++--
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> index 1e0b1bca7c94..8493dd7d5f1f 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> @@ -223,11 +223,11 @@ &uart1 {
> clocks = <&zynqmp_clk UART1_REF>, <&zynqmp_clk LPD_LSBUS>;
> };
>
> -&usb0 {
> +&dwc3_0 {
> clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
> };
>
> -&usb1 {
> +&dwc3_1 {
> clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
> };
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 74e66443e4ce..ba68fb8529ee 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -811,7 +811,6 @@ usb0: usb@ff9d0000 {
> status = "disabled";
> compatible = "xlnx,zynqmp-dwc3";
> reg = <0x0 0xff9d0000 0x0 0x100>;
> - clock-names = "bus_clk", "ref_clk";
> power-domains = <&zynqmp_firmware PD_USB_0>;
> resets = <&zynqmp_reset ZYNQMP_RESET_USB0_CORERESET>,
> <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>,
> @@ -825,6 +824,7 @@ dwc3_0: usb@fe200000 {
> interrupt-parent = <&gic>;
> interrupt-names = "dwc_usb3", "otg";
> interrupts = <0 65 4>, <0 69 4>;
> + clock-names = "bus_early", "ref";
> #stream-id-cells = <1>;
> iommus = <&smmu 0x860>;
> snps,quirk-frame-length-adjustment = <0x20>;
> @@ -838,7 +838,6 @@ usb1: usb@ff9e0000 {
> status = "disabled";
> compatible = "xlnx,zynqmp-dwc3";
> reg = <0x0 0xff9e0000 0x0 0x100>;
> - clock-names = "bus_clk", "ref_clk";
> power-domains = <&zynqmp_firmware PD_USB_1>;
> resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,
> <&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>,
> @@ -852,6 +851,7 @@ dwc3_1: usb@fe300000 {
> interrupt-parent = <&gic>;
> interrupt-names = "dwc_usb3", "otg";
> interrupts = <0 70 4>, <0 74 4>;
> + clock-names = "bus_early", "ref";
> #stream-id-cells = <1>;
> iommus = <&smmu 0x861>;
> snps,quirk-frame-length-adjustment = <0x20>;
Tested and working on ZynqMP.
Reviewed-by: Robert Hancock <robert.hancock@xxxxxxxxxx>
Tested-by: Robert Hancock <robert.hancock@xxxxxxxxxx>
