Add speedbin efuse nvmem binding needed for the opp table for the CPU freqs. Signed-off-by: Ansuel Smith <ansuelsmth@xxxxxxxxx> --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 1e6297d6f302..a1a809134d9e 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -956,6 +956,9 @@ tsens_calib: calib@400 { tsens_calib_backup: calib_backup@410 { reg = <0x410 0xb>; }; + speedbin_efuse: speedbin@0c0 { + reg = <0x0c0 0x4>; + }; }; gcc: clock-controller@900000 { -- 2.33.1