Document qcom,gcc-ipq8064 binding needed to declare pxo and cxo source clocks. The gcc node is also used by the tsens driver, already Documented, to get the calib nvmem cells and the base reg from gcc. Signed-off-by: Ansuel Smith <ansuelsmth@xxxxxxxxx> --- .../bindings/clock/qcom,gcc-ipq8064.yaml | 67 +++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml new file mode 100644 index 000000000000..2dc254fdf161 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064 + +maintainers: + - Ansuel Smith <ansuelsmth@xxxxxxxxx> + +description: | + Qualcomm global clock control module which supports the clocks, resets and + power domains on IPQ8064. + +properties: + compatible: + const: qcom,gcc-ipq8064 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + + clocks: + items: + - description: PXO source + - description: CX0 source + + clock-names: + items: + - const: pxo + - const: cxo + +required: + - compatible + - reg + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + - clocks + - clock-names + +additionalProperties: true + +examples: + - | + gcc: clock-controller@900000 { + compatible = "qcom,gcc-ipq8064", "syscon"; + reg = <0x00900000 0x4000>; + clocks = <&pxo_board>, <&cxo_board>; + clock-names = "pxo", "cxo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + + /* Tsens node definition */ + + }; +... -- 2.33.1
