> -----Original Message----- > From: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx> > Sent: Thursday, January 13, 2022 4:07 PM > To: kishon@xxxxxx; vkoul@xxxxxxxxxx; lorenzo.pieralisi@xxxxxxx; > l.stach@xxxxxxxxxxxxxx; tharvey@xxxxxxxxxxxxx; robh@xxxxxxxxxx; > galak@xxxxxxxxxxxxxxxxxxx; Hongxing Zhu <hongxing.zhu@xxxxxxx>; > bhelgaas@xxxxxxxxxx; shawnguo@xxxxxxxxxx > Cc: linux-phy@xxxxxxxxxxxxxxxxxxx; linux-pci@xxxxxxxxxxxxxxx; > kernel@xxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; > linux-kernel@xxxxxxxxxxxxxxx; dl-linux-imx <linux-imx@xxxxxxx>; > linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > Subject: Re: [PATCH v7 0/8] Add the imx8m pcie phy driver and imx8mm > pcie support > > Hi Richard > > On Thu, 2021-12-02 at 16:02 +0800, Richard Zhu wrote: > > Refer to the discussion [1] when try to enable i.MX8MM PCIe support, > > one standalone PCIe PHY driver should be seperated from i.MX PCIe > > driver when enable i.MX8MM PCIe support. > > > > This patch-set adds the standalone PCIe PHY driver suport[1-5], and > > i.MX8MM PCIe support[6-8] to have whole view to review this > patch-set. > > > > The PCIe works on i.MX8MM EVK board based the the blkctrl power > driver > > [2] and this patch-set. And tested by Tim and Marcel on the different > > reference clock modes boards. > > > > [1] > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa > tc > > > hwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F20210510141509. > 929120 > > > -3-l.stach%40pengutronix.de%2F&data=04%7C01%7Chongxing.zhu > %40nxp.c > > > om%7C487b28aecfd14bdfe1b808d9d66bb4ce%7C686ea1d3bc2b4c6fa92 > cd99c5c3016 > > > 35%7C0%7C0%7C637776580350900040%7CUnknown%7CTWFpbGZsb3d > 8eyJWIjoiMC4wLj > > > AwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000& > amp;sdata= > > > 8pMSNCoRVpWBld2dSGUUw2Dpq%2FlRAqsVWLqAJ0njEgo%3D&re > served=0 > > [2] > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa > tc > > > hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F20210910 > 202640 > > .980366-1-l.stach%40pengutronix.de%2F&data=04%7C01%7Chon > gxing.zhu% > > > 40nxp.com%7C487b28aecfd14bdfe1b808d9d66bb4ce%7C686ea1d3bc2b > 4c6fa92cd99 > > > c5c301635%7C0%7C0%7C637776580350900040%7CUnknown%7CTWFp > bGZsb3d8eyJWIjo > > > iMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D% > 7C3000& > > ;sdata=MHPLXbIyL2pnZK%2FdVkDcJBJBjlqtPIOzzwLsNEKlCqs%3D& > ;reserved=0 > > > > Main changes v6 --> v7: > > - Add "Reviewed-by: Rob Herring <robh@xxxxxxxxxx>" into #2 patches. > > - Regarding Vinod's review comments do the following changes. > > - Don't build in the PHY driver in default. > > - Remove the extra blank line > > - Correct the license tag. > > > > Main changes v5 --> v6: > > - Add "Reviewed-by: Rob Herring <robh@xxxxxxxxxx>" into #1 and #3 > patches. > > - Merge Rob's review comments to the #2 patch. > > > > Main changes v4 --> v5: > > - Set the AUX_EN always 1b'1, thus it can fix the regression > > introduced in v4 > > series on Marcel's board. > > - Use the lower-case letter in the devicetreee refer to Marcel's > comments. > > - Since the default value of the deemphasis parameters are zero, only > > set > > the deemphasis registers when the input paramters are none zero. > > > > Main changes v3 --> v4: > > - Update the yaml to fix syntax error, add maxitems and drop > > description of phy > > - Correct the clock name in PHY DT node. > > - Squash the EVK board relalted dts changes into one patch, and drop > > the > > useless dummy clock and gpio suffix in DT nodes. > > - Add board specific de-emphasis parameters as DT properties. Thus > > each board > > can specify its actual de-emphasis values. > > - Update the commit log of PHY driver. > > - Remove the useless codes from PCIe driver, since they are moved to > > PHY driver > > - After the discussion and verification of the CLKREQ# configurations > > with Tim, > > agree to add an optional boolean property "fsl,clkreq-unsupported", > > indicates > > the CLKREQ# signal is hooked or not in HW designs. > > - Add "Tested-by: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>" tag, > > since > > Marcel help to test the v3 patch-set. > > > > Main changes v2 --> v3: > > - Regarding Lucas' comments. > > - to have a whole view to review the patches, send out the i.MX8MM > PCIe support too. > > - move the PHY related bits manipulations of the GPR/SRC to > standalone PHY driver. > > - split the dts changes to SOC and board DT, and use the enum > instead of raw value. > > - update the license of the dt-binding header file. > > > > Changes v1 --> v2: > > - Update the license of the dt-binding header file to make the license > > compatible with dts files. > > - Fix the dt_binding_check errors. > > > > > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 > +++ > > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml | 92 > > +++++++++++++++++++++++++++++++ > > > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > | 55 > > +++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx8mm.dtsi > > > | 46 +++++++++++++++- > drivers/pci/controller/dwc/pci-imx6.c > > | 83 +++++++++++++++++++++++++--- > drivers/phy/freescale/Kconfig > > > | 8 +++ > drivers/phy/freescale/Makefile > > > | 1 + > drivers/phy/freescale/phy-fsl-imx8m-pcie.c | > > 236 > > > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++ > > > include/dt-bindings/phy/phy-imx8-pcie.h > | 14 > > +++++ > > 9 files changed, 532 insertions(+), 9 deletions(-) > > > > [PATCH v7 1/8] dt-bindings: phy: phy-imx8-pcie: Add binding for the > > [PATCH v7 2/8] dt-bindings: phy: Add imx8 pcie phy driver support > > [PATCH v7 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name > > [PATCH v7 4/8] arm64: dts: imx8mm: Add the pcie phy support [PATCH > v7 > > 5/8] phy: freescale: pcie: Initialize the imx8 pcie [PATCH v7 6/8] > > arm64: dts: imx8mm: Add the pcie support [PATCH v7 7/8] arm64: dts: > > imx8mm-evk: Add the pcie support on imx8mm [PATCH v7 8/8] PCI: > imx: > > Add the imx8mm pcie support > > What is the status of patches 4, 6 and 7? While the rest has been pulled > those are still missing in today's - next. [Richard Zhu] Thanks for your care. I used to ping Shawn twice on Dec17/27 2021, but couldn't receive his response. Anyway, I would continue to ping him later. Best Regards Richard Zhu > > Cheers > > Marcel
