Set the reference clock period and FLADJ fields in the DWC3 USB driver
to 50ns with no fractional portion to match the ZynqMP configuration.
Signed-off-by: Robert Hancock <robert.hancock@xxxxxxxxxx>
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 74e66443e4ce..2f531707d5d4 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -828,6 +828,8 @@ dwc3_0: usb@fe200000 {
#stream-id-cells = <1>;
iommus = <&smmu 0x860>;
snps,quirk-frame-length-adjustment = <0x20>;
+ snps,ref-clock-period-ns = <50>;
+ snps,ref-clock-fladj = <0>;
/* dma-coherent; */
};
};
@@ -855,6 +857,8 @@ dwc3_1: usb@fe300000 {
#stream-id-cells = <1>;
iommus = <&smmu 0x861>;
snps,quirk-frame-length-adjustment = <0x20>;
+ snps,ref-clock-period-ns = <50>;
+ snps,ref-clock-fladj = <0>;
/* dma-coherent; */
};
};
--
2.31.1
