On Fri, Nov 26, 2021 at 2:31 AM Kishon Vijay Abraham I <kishon@xxxxxx> wrote:
>
> AM654 RootComplex has a hard coded 64 bit BAR of size 1MB and also has
> both MSI and MSI-X capability in it's config space. If PCIEPORTBUS is
> enabled, it tries to configure MSI-X and msix_mask_all() adds about 10
> Second boot up delay when it tries to write to undefined location.
>
> Add quirk to mark AM654 RC BAR flag as IORESOURCE_UNSET so that
> msix_map_region() returns NULL for Root Complex and avoid un-desirable
> writes to MSI-X table.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@xxxxxx>
> ---
> drivers/pci/controller/dwc/pci-keystone.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
> index 52d20fe17ee9..73e6626a0d8f 100644
> --- a/drivers/pci/controller/dwc/pci-keystone.c
> +++ b/drivers/pci/controller/dwc/pci-keystone.c
> @@ -557,8 +557,14 @@ static void ks_pcie_quirk(struct pci_dev *dev)
> { 0, },
> };
>
> - if (pci_is_root_bus(bus))
> + if (pci_is_root_bus(bus)) {
The existing quirk has to be called for every device. But this quirk
applies to just the RC, so can't you add another quirk and use the
existing quirk infrastructure matching mechanism?
> bridge = dev;
> + if (pci_match_id(am6_pci_devids, bridge)) {
> + struct resource *r = &dev->resource[0];
> +
> + r->flags |= IORESOURCE_UNSET;
> + }
> + }
>
> /* look for the host bridge */
> while (!pci_is_root_bus(bus)) {
> --
> 2.17.1
>
