Hi Luca,
On 12/29/2021 3:11 PM, Luca Weiss wrote:
Hi Maulik,
On Mon Dec 20, 2021 at 1:24 PM CET, Maulik Shah wrote:
Hi Luca,
On 12/13/2021 8:52 PM, Luca Weiss wrote:
Convert the PDC interrupt controller bindings to YAML.
Signed-off-by: Luca Weiss <luca.weiss@xxxxxxxxxxxxx>
---
This patch depends on the following patch, which fixed sm8250 & sm8350
compatibles and adds sm6350.
https://lore.kernel.org/linux-arm-msm/20211213082614.22651-4-luca.weiss@xxxxxxxxxxxxx/
Also, if somebody has a better suggestion for the register names,
the second one is pulled from downstream commit message which calls it
both "SPI config registers" and "interface registers":
https://source.codeaurora.org/quic/la/kernel/msm-4.19/commit/?id=cdefb63745e051a5bcf69663ac9d084d7da1eeec
Thanks for the patch. Please use "apss-shared-spi-cfg" name for the
second reg.
It was intended in [1] to remove it since there are no user in upstream
for second reg. but it should be fine to convert existing to yaml first
and then look to fix that.
Do you have a full-text version of that? I'd use it instead of this in
the binding.
- description: PDC interface register region
you can use below description,
description: Edge or Level config register for SPI interrupts
Thanks,
Maulik
