On Sat, 18 Dec 2021 17:10:20 +0300, Dmitry Baryshkov wrote: > Document the PCIe DT bindings for SM8450 SoC. The PCIe IP is similar > to the one used on SM8250, however unlike SM8250, PCIe0 and PCIe1 use > different set of clocks, so two compatible entries are required. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > --- > .../devicetree/bindings/pci/qcom,pcie.txt | 22 ++++++++++++++++++- > 1 file changed, 21 insertions(+), 1 deletion(-) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
