On 13/12/2021 03.26, Marc Zyngier wrote: > On Thu, 09 Dec 2021 04:32:47 +0000, > Hector Martin <marcan@xxxxxxxxx> wrote: >> >> This allows us to support AIC variants with different numbers of IRQs >> based on capability registers. >> >> Signed-off-by: Hector Martin <marcan@xxxxxxxxx> >> --- >> drivers/irqchip/irq-apple-aic.c | 73 +++++++++++++++++++++++++-------- >> 1 file changed, 56 insertions(+), 17 deletions(-) >> >> diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c >> index 572d1af175fc..d03caed51d56 100644 >> --- a/drivers/irqchip/irq-apple-aic.c >> +++ b/drivers/irqchip/irq-apple-aic.c >> @@ -312,12 +326,15 @@ static int aic_irq_set_affinity(struct irq_data *d, >> struct aic_irq_chip *ic = irq_data_get_irq_chip_data(d); >> int cpu; >> >> + if (!ic->info.target_cpu) >> + return -EINVAL; > > Can this even happen? And if it did, this should scream loudly, > shouldn't it? Yeah, it can't happen, so this really should be a BUG_ON. This is mostly there in case somehow we end up with confusion between AIC versions and register offsets later, since AIC2 does not use this field but also shouldn't be setting up an irqchip that calls this function. -- Hector Martin (marcan@xxxxxxxxx) Public Key: https://mrcn.st/pub
