From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> Add device tree bindings for the hardware rng device accessed via the system services on the Microchip PolarFire SoC. Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> --- .../bindings/rng/microchip,mpfs-rng.yaml | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml diff --git a/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml new file mode 100644 index 000000000000..32cbc37c9292 --- /dev/null +++ b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/rng/microchip,mpfs-rng.yaml#"; +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; + +title: Microchip MPFS random number generator + +maintainers: + - Conor Dooley <conor.dooley@xxxxxxxxxxxxx> + +description: | + The hardware random number generator on the Polarfire SoC is + accessed via the mailbox interface provided by the system controller + +properties: + compatible: + const: microchip,mpfs-rng + +required: + - compatible + +additionalProperties: false + +examples: + - | + hwrandom: hwrandom { + compatible = "microchip,mpfs-rng"; + }; -- 2.33.1
