This patch series adds DDR performance monitor support on Marvell cn10k series of processor. First patch adds device tree binding changes. Second patch add basic support (without overflow and event ownership). Third and fourth patch adds overflow and event ownership respectively. Seems like 4th patch can be merged in second patch, For easy review it is currently separate v6->v7: - Moved Kconfig to last patch - added Reviewed-by v5->v6: - Changed COMPILE_TEST to (COMPILE_TEST && 64BIT) v4->v5: - Added missing COMPILE_TEST dependency v3->v4: - Added Rob Herring reviewed-by for dt-binding patch v2->v3: - dt-binding, ddrcpmu@1 -> pmu@87e1c0000000 - Add COMPILE_TEST as a dependency - Switch to sysfs_emit() - Error propagation when invalif event requested - Switch to devm_platform_get_and_ioremap_resource() - Other review comments on v2. v1->v2: - DT binding changed to new DT Schema - writeq/readq changed to respective relaxed - Using PMU_EVENT_ATTR_ID Bharat Bhushan (4): dt-bindings: perf: marvell: cn10k ddr performance monitor perf/marvell: CN10k DDR performance monitor support perf/marvell: cn10k DDR perfmon event overflow handling perf/marvell: cn10k DDR perf event core ownership .../bindings/perf/marvell-cn10k-ddr.yaml | 37 + drivers/perf/Kconfig | 7 + drivers/perf/Makefile | 1 + drivers/perf/marvell_cn10k_ddr_pmu.c | 756 ++++++++++++++++++ include/linux/cpuhotplug.h | 1 + 5 files changed, 802 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml create mode 100644 drivers/perf/marvell_cn10k_ddr_pmu.c -- 2.17.1
