On Mittwoch, 8. Dezember 2021 19:54:45 CET Johan Jonker wrote: > This phy can be used as pcie-phy, usb3-phy, sata-phy or sgmii-phy. > > ============================================= > > Changed V4 by Johan Jonker: > TEST COMPILED ONLY! > Driver not verified with hardware! > Produced in the hope that we can get some review progress > with this serie for the documents and driver. > Use at your own risk! > > restyle > add devm_reset_control_array_get() > remove clk structure > change refclk DT parse > change dev_err message > add dot to phrase > add ext_refclk variable > add enable_ssc variable > rename rockchip_combphy_param_write > remove param_read > replace rockchip-naneng-combphy driver name > > rename node name > remove reset-names > move #phy-cells > add rockchip,rk3568-pipe-grf > add rockchip,rk3568-pipe-phy-grf > > ============================================= > Tested-by: Nicolas Frattaroli <frattaroli.nicolas@xxxxxxxxx> Applied this on top of 5.16-rc4, added the necessary device tree changes to rk356x.dtsi and rk3566-quartz64-a.dts and ran it on my Quartz64. I tested PCIe2x1 on the one combphy and SATA on the other, simultaneously. Devices were detected correctly (with some hiccups on SATA due to a Quartz64 Model A design issue, but it was detected eventually) and some transfers were done to ensure it's stable. It is stable. Regards, Nicolas Frattaroli
