On Thu, Dec 09, 2021 at 04:13:58PM -0500, Jim Quinlan wrote:
> v10 -- Bindings commit example: in comment, refer to bridge under
> controller node as a root port. (Pali)
> -- Bindings commit example: remove three properties that are not
> appropriate for a PCIe endpoint node. (Rob)
>
> v9 -- Simplify where this mechanism works: instead of looking for
> regulators below every bridge, just look for them at the
> bridge under the root bus (root port). Now there is no
> modification of portdrv_{pci,core}.c in this submission.
> -- Although Pali is working on support for probing native
> PCIe controller drivers, this work may take some time to
> implement and it still might not be able to accomodate
> our driver's requirements (e.g. vreg suspend/resume control).
> -- Move regulator suspend/resume control to Brcm RC driver. It
> must reside there because (a) in order to know when to
> initiate linkup during resume and (b) to turn on the
> regulators before any config-space accesses occur.
You now have a mixture of 'generic' add/remove_bus hooks and the host
controller suspend/resume managing the regulators. I think long term,
the portdrv is going to be the right place for all of this with some
interface defined for link control. So I think this solution moves
sideways rather than towards anything common.
Unfortunately, the only leverage maintainers have to get folks to care
about any refactoring is to reject features. We're lucky to find anyone
to test refactoring when posted if done independently. There's a long
list of commits of PCI hosts that I've broken to prove that. So it's
up to Lorenzo and Bjorn on what they want to do here.
Rob
