On Sat, Aug 23, 2014 at 10:36 AM, Russell King - ARM Linux <linux@xxxxxxxxxxxxxxxx> wrote: > On Sat, Aug 23, 2014 at 10:32:23AM -0300, Fabio Estevam wrote: >> On Sat, Aug 23, 2014 at 6:11 AM, Russell King >> <rmk+kernel@xxxxxxxxxxxxxxxx> wrote: >> >> > - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 >> > + MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x80000000 >> >> It would be better to replace the '0x80000000' with the real iomux >> value (like 0x1b0b0 for example), so that we do not need to rely on >> the bootloader doing the correct configuration for us. > > I'd just end up choosing something which appears to work - I've no idea > at present what an appropriate value should be here. In the working system, you could read the register: IOMUXC_SW_PAD_CTL_PAD_EIM_AD05 (address: 0x20E043C) Most likely it will return the default value of 0xb0b1 if the bootloader has not re-configured it. ,and then put this read value into the device tree. This way we guarantee that the kernel will have this pin correctly configured, without depending on the bootloader. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
