Hi, This patch series fixes the plgpio support on SPEAr3xx SOCs. The first four patches of this series fixes a ressources sharing issue between the plgpio driver and the pinmux driver. Indeed, these two drivers can use the same IO address range on some SPEAr3xx SOCs. To solve the issue, a regmap (syscon managed) is used in both drivers and the plgpio driver can reference the pinmux regmap to use it. The second part of this series is related to IRQs. The plgpio on SPEAr320s SOC uses an IRQ line in the reserve range (from SPEAr320 point of view). This issue is fixed enabling all the 'reserved' IRQs and adding a dtsi file for the SPEAr320s with the correct interrupt for the plgpio node. Best regards, Herve Herve Codina (6): pinctrl: spear: spear: Convert to regmap pinctrl: spear: plgpio: Convert to regmap pinctrl: spear: plgpio: Introduce regmap phandle ARM: dts: spear3xx: Use plgpio regmap in SPEAr310 and SPEAr320 irq: spear-shirq: Add support for IRQ 0..6 ARM: dts: spear3xx: Add spear320s dtsi arch/arm/boot/dts/spear310.dtsi | 1 + arch/arm/boot/dts/spear320.dtsi | 1 + arch/arm/boot/dts/spear320s.dtsi | 24 ++++ drivers/irqchip/spear-shirq.c | 2 + drivers/pinctrl/spear/pinctrl-plgpio.c | 148 +++++++++++++++---------- drivers/pinctrl/spear/pinctrl-spear.c | 10 +- drivers/pinctrl/spear/pinctrl-spear.h | 12 +- 7 files changed, 131 insertions(+), 67 deletions(-) create mode 100644 arch/arm/boot/dts/spear320s.dtsi -- 2.31.1
