On Fri, Nov 26, 2021 at 07:13:23PM +0000, Wells Lu 呂芳騰 wrote: > Hi Andrew, > > I read specification of ICPlus IP101G (10M/100M PHY). > Bits of register 0 (control) and register 1 (status) > are R/W or RO type. They will not be cleared after > read. No matter how many times they are read, the > read-back value is the same. Please read 802.3, Section 22.2.4.2: Status register (Register 1) Table 22-8 Status register bit definitions Bit 1.2 Link Status is marked as RO/LL, meaning read only Latching low. > Can we go with this approach? You need to not make any read on the PHY which Linux is driving. Configure the hardware to read on an address where there is no PHY. Andrew
