On 2021/11/26 0:31, Geert Uytterhoeven wrote:
> To improve human readability and enable automatic validation, the tuples
> in the various properties containing interrupt specifiers should be
> grouped.
>
> Fix this by grouping the tuples of "interrupts" and
> "interrupts-extended" properties using angle brackets.
>
> Signed-off-by: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> ---
> arch/riscv/boot/dts/canaan/k210.dtsi | 23 ++++++++++++-----------
> 1 file changed, 12 insertions(+), 11 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/canaan/k210.dtsi b/arch/riscv/boot/dts/canaan/k210.dtsi
> index 5e8ca8142482153b..56f57118c633b91a 100644
> --- a/arch/riscv/boot/dts/canaan/k210.dtsi
> +++ b/arch/riscv/boot/dts/canaan/k210.dtsi
> @@ -103,8 +103,8 @@ rom0: nvmem@1000 {
> clint0: timer@2000000 {
> compatible = "canaan,k210-clint", "sifive,clint0";
> reg = <0x2000000 0xC000>;
> - interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7
> - &cpu1_intc 3 &cpu1_intc 7>;
> + interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
> + <&cpu1_intc 3>, <&cpu1_intc 7>;
> };
>
> plic0: interrupt-controller@c000000 {
> @@ -113,7 +113,7 @@ plic0: interrupt-controller@c000000 {
> compatible = "canaan,k210-plic", "sifive,plic-1.0.0";
> reg = <0xC000000 0x4000000>;
> interrupt-controller;
> - interrupts-extended = <&cpu0_intc 11 &cpu1_intc 11>;
> + interrupts-extended = <&cpu0_intc 11>, <&cpu1_intc 11>;
> riscv,ndev = <65>;
> };
>
> @@ -130,10 +130,11 @@ gpio0: gpio-controller@38001000 {
> compatible = "canaan,k210-gpiohs", "sifive,gpio0";
> reg = <0x38001000 0x1000>;
> interrupt-controller;
> - interrupts = <34 35 36 37 38 39 40 41
> - 42 43 44 45 46 47 48 49
> - 50 51 52 53 54 55 56 57
> - 58 59 60 61 62 63 64 65>;
> + interrupts = <34>, <35>, <36>, <37>, <38>, <39>, <40>,
> + <41>, <42>, <43>, <44>, <45>, <46>, <47>,
> + <48>, <49>, <50>, <51>, <52>, <53>, <54>,
> + <55>, <56>, <57>, <58>, <59>, <60>, <61>,
> + <62>, <63>, <64>, <65>;
> gpio-controller;
> ngpios = <32>;
> };
> @@ -141,7 +142,7 @@ gpio0: gpio-controller@38001000 {
> dmac0: dma-controller@50000000 {
> compatible = "snps,axi-dma-1.01a";
> reg = <0x50000000 0x1000>;
> - interrupts = <27 28 29 30 31 32>;
> + interrupts = <27>, <28>, <29>, <30>, <31>, <32>;
> #dma-cells = <1>;
> clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
> clock-names = "core-clk", "cfgr-clk";
> @@ -316,7 +317,7 @@ fpioa: pinmux@502b0000 {
> timer0: timer@502d0000 {
> compatible = "snps,dw-apb-timer";
> reg = <0x502D0000 0x100>;
> - interrupts = <14 15>;
> + interrupts = <14>, <15>;
> clocks = <&sysclk K210_CLK_TIMER0>,
> <&sysclk K210_CLK_APB0>;
> clock-names = "timer", "pclk";
> @@ -326,7 +327,7 @@ timer0: timer@502d0000 {
> timer1: timer@502e0000 {
> compatible = "snps,dw-apb-timer";
> reg = <0x502E0000 0x100>;
> - interrupts = <16 17>;
> + interrupts = <16>, <17>;
> clocks = <&sysclk K210_CLK_TIMER1>,
> <&sysclk K210_CLK_APB0>;
> clock-names = "timer", "pclk";
> @@ -336,7 +337,7 @@ timer1: timer@502e0000 {
> timer2: timer@502f0000 {
> compatible = "snps,dw-apb-timer";
> reg = <0x502F0000 0x100>;
> - interrupts = <18 19>;
> + interrupts = <18>, <19>;
> clocks = <&sysclk K210_CLK_TIMER2>,
> <&sysclk K210_CLK_APB0>;
> clock-names = "timer", "pclk";
>
Reviewed-by: Damien Le Moal <damien.lemoal@xxxxxxxxxxxxxxxxxx>
Tested-by: Damien Le Moal <damien.lemoal@xxxxxxxxxxxxxxxxxx>
--
Damien Le Moal
Western Digital Research
