On 11/23/2021 11:28 PM, Matthias Kaehlcke wrote:
On Tue, Nov 23, 2021 at 12:30:13PM +0530, Rajendra Nayak wrote:
From: Kshitiz Godara <kgodara@xxxxxxxxxxxxxx>
Add Touchscreen and touchpad hid-over-i2c node
to which board(s)?
will update
Signed-off-by: Kshitiz Godara <kgodara@xxxxxxxxxxxxxx>
Signed-off-by: Rajendra Nayak <rnayak@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sc7280-crd.dts | 63 +++++++++++++++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
index 8c2aee6..bef3037 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts
@@ -23,6 +23,47 @@
};
};
+ap_tp_i2c: &i2c0 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ trackpad: trackpad@15 {
+ compatible = "hid-over-i2c";
+ reg = <0x15>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&tp_int_odl>;
+
+ interrupt-parent = <&tlmm>;
+ interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+
+ post-power-on-delay-ms = <20>;
+ hid-descr-addr = <0x0001>;
+ vdd-supply = <&vreg_l18b_1p8>;
+
+ wakeup-source;
+ };
+};
+
+ap_ts_pen_1v8: &i2c13 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ ap_ts: touchscreen@5c {
+ compatible = "hid-over-i2c";
+ reg = <0x5C>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
+
+ interrupt-parent = <&tlmm>;
+ interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
+
+ post-power-on-delay-ms = <500>;
+ hid-descr-addr = <0x0000>;
+
+ vdd-supply = <&vreg_l19b_1p8>;
+ };
+};
+
&nvme_pwren {
pins = "gpio51";
};
@@ -30,3 +71,25 @@
&nvme_3v3_regulator {
gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
};
+
+&tlmm {
+ tp_int_odl: tp-int-odl {
+ pins = "gpio7";
+ function = "gpio";
+ input-enable;
Not sure about this one, is the explicit 'input-enable' actually needed here?
Maybe not, will test it once after I remove it
+ bias-disable;
+ };
+
+ ts_int_l: ts-int-l {
+ pins = "gpio55";
+ function = "gpio";
+ bias-pull-up;
+ };
+
+ ts_reset_l: ts-reset-l {
+ pins = "gpio54";
+ function = "gpio";
+ bias-disable;
+ drive-strength = <2>;
As per my comment on "[3/4] arm64: dts: qcom: sc7280: Define EC and H1 nodes" it
seems setting the drive strength to 2 isn't necessary, since that's the default.
right I'll remove it, thanks
--
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