On Tue, Nov 16, 2021 at 4:02 PM Emil Renner Berthing <kernel@xxxxxxxx> wrote: > Add a combined pinctrl and GPIO driver for the JH7100 RISC-V SoC by > StarFive Ltd. This is a test chip for their upcoming JH7110 SoC, which > is said to feature only minor changes to these pinctrl/GPIO parts. > > For each "GPIO" there are two registers for configuring the output and > output enable signals which may come from other peripherals. Among these > are two special signals that are constant 0 and constant 1 respectively. > Controlling the GPIOs from software is done by choosing one of these > signals. In other words the same registers are used for both pin muxing > and controlling the GPIOs, which makes it easier to combine the pinctrl > and GPIO driver in one. > > I wrote the pinconf and pinmux parts, but the GPIO part of the code is > based on the GPIO driver in the vendor tree written by Huan Feng with > cleanups and fixes by Drew and me. > > Datasheet: https://github.com/starfive-tech/JH7100_Docs/blob/main/JH7100%20Data%20Sheet%20V01.01.04-EN%20(4-21-2021).pdf > Co-developed-by: Huan Feng <huan.feng@xxxxxxxxxxxxxxxx> > Signed-off-by: Huan Feng <huan.feng@xxxxxxxxxxxxxxxx> > Signed-off-by: Emil Renner Berthing <kernel@xxxxxxxx> > Co-developed-by: Drew Fustini <drew@xxxxxxxxxxxxxxx> > Signed-off-by: Drew Fustini <drew@xxxxxxxxxxxxxxx> Overall there is nothing wrong with this, and it is in nice shape. Let's merge it: Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx> Yours, Linus Walleij
