Add devicetree binding for the SMMUv3 PMU, called Performance Monitoring Counter Group (PMCG) in the spec. Each SMMUv3 implementation can have multiple independent PMCGs, for example one for the Translation Control Unit (TCU) and one per Translation Buffer Unit (TBU). Since v1 [1]: * Fixed warnings in the binding doc * Removed hip08 support * Merged Robin's version. I took the liberty of splitting the driver patch into 2 and 3. One fix in patch 3, and whitespace changes (the driver uses spaces instead of tabs to align #define values, which I was going to fix but actually seems more common across the tree.) [1] https://lore.kernel.org/linux-iommu/20211116113536.69758-1-jean-philippe@xxxxxxxxxx/ Jean-Philippe Brucker (2): dt-bindings: Add Arm SMMUv3 PMCG binding perf/smmuv3: Add devicetree support Robin Murphy (1): perf/smmuv3: Synthesize IIDR from CoreSight ID registers .../bindings/perf/arm,smmu-v3-pmcg.yaml | 70 +++++++++++++++++++ drivers/perf/arm_smmuv3_pmu.c | 66 ++++++++++++++++- 2 files changed, 134 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/perf/arm,smmu-v3-pmcg.yaml -- 2.33.1
