On Tue, Aug 19, 2014 at 12:01:51PM +0530, Suman Tripathi wrote: > The link down issue in first attempt happens due to 2 H/W errata below: > > 1. Due to HW errata, during speed negotiation, sometimes controller > is not able to detect ALIGN at GEN3(6Gbps) within 54.6us results in > a timeout. This issue can be recovered by issuing a COMRESET again. > > 2. Due to HW errata, although ALIGH detection is successfull, due to > 8b/10b and disparity BERR, sometimes the signature from the drive is > not received successfully by the Host controller. Due to this the > communication with the host and drive is not established due to > locking of CDR(clock and data recovery) circuit. This issue can be > recovered by issuing a COMRESET again. > > This patch fixes the above issues by retrying the COMRESET with a > maximum attempts of 3. It's kinda nasty but if it's necessary. That said, can you please update the comment so that it actually matches the code? Also, Wouldn't it be better to check how the reset failed before retrying? Thanks. -- tejun -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
