On Fri, 29 Oct 2021 14:09:26 -0700, Florian Fainelli <f.fainelli@xxxxxxxxx> wrote:
> The PCIe host bridge has two interrupt lines, one that goes towards it
> PCIE_INTR2 second level interrupt controller and one for its MSI second
> level interrupt controller. The first interrupt line is not currently
> managed by the driver, which is why it was not a functional problem.
>
> The interrupt-map property was also only listing the PCI_INTA interrupts
> when there are also the INTB, C and D.
>
> Reported-by: Jim Quinlan <jim2101024@xxxxxxxxx>
> Fixes: d5c8dc0d4c88 ("ARM: dts: bcm2711: Enable PCIe controller")
> Signed-off-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
> ---
Applied to https://github.com/Broadcom/stblinux/commits/devicetree/fixes, thanks!
--
Florian
