On Sun, Oct 31, 2021 at 04:07:05PM +0100, Marek Behún wrote: > From: Pali Rohár <pali@xxxxxxxxxx> > > This property specifies slot power limit in mW unit. It is a form-factor > and board specific value and must be initialized by hardware. > > Some PCIe controllers delegate this work to software to allow hardware > flexibility and therefore this property basically specifies what should > host bridge program into PCIe Slot Capabilities registers. > > The property needs to be specified in mW unit instead of the special format > defined by Slot Capabilities (which encodes scaling factor or different > unit). Host drivers should convert the value from mW to needed format. > > Signed-off-by: Pali Rohár <pali@xxxxxxxxxx> > Signed-off-by: Marek Behún <kabel@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/pci/pci.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt > index 6a8f2874a24d..7296d599c5ac 100644 > --- a/Documentation/devicetree/bindings/pci/pci.txt > +++ b/Documentation/devicetree/bindings/pci/pci.txt > @@ -32,6 +32,12 @@ driver implementation may support the following properties: > root port to downstream device and host bridge drivers can do programming > which depends on CLKREQ signal existence. For example, programming root port > not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal. > +- slot-power-limit-miliwatt: Typo. But we shouldn't be adding to pci.txt. This needs to go in the schema[1]. Patch to devicetree-spec list or GH PR is fine. > + If present, this property specifies slot power limit in milliwatts. Host > + drivers can parse this property and use it for programming Root Port or host > + bridge, or for composing and sending PCIe Set_Slot_Power_Limit messages > + through the Root Port or host bridge when transitioning PCIe link from a > + non-DL_Up Status to a DL_Up Status. If your slots are behind a switch, then doesn't this apply to any bridge port? [1] https://github.com/devicetree-org/dt-schema/blob/main/schemas/pci/pci-bus.yaml
